The present invention relates to phase locked loops, and more particularly to a low noise Yttrium-Iron-Garnet (YIG) oscillator based phase locked loop for radio frequency (RF) applications.
In its simplest form a microwave or RF signal source has a phase locked loop (PLL) using a YIG oscillator. The YIG oscillator, which is central to the design, is an electronic device that generates an output signal with a frequency proportional to the strength of a magnetic field impressed upon a YIG sphere. The magnetic field is created by direct currents (DC) in the oscillator's main and fine tune coils which may be augmented in some cases by permanent magnets. Phase locking is achieved in the usual sense in that the output frequency of the YIG oscillator is divided down by a frequency divider and compared to a reference frequency applied at a phase detector. The phase detector generates a control voltage proportional to the phase difference between the two frequency signals applied at its input ports. This phase error voltage is filtered by a loop filter, converted to a DC current, and applied to the YIG oscillator fine tune coil to adjust its output frequency. When the PLL is “locked”, the YIG oscillator's output frequency is “N times” the applied reference frequency, i.e., Fout=N*Fref.
In a typical PLL application the YIG oscillator is tuned approximately to a desired output operating frequency by establishing a fixed current in the main coil. Phase locking the YIG oscillator to the reference frequency is achieved by controlling the fine tune coil current with the filtered control current derived from the phase detector. YIG oscillators have the desirable attributes of wide tuning range on the order of several octaves, operation at microwave frequencies, linear tuning response with respect to the coil currents, and often good phase noise performance. One disadvantage of present YIG technology is that the modulation bandwidth of the fine tune coil is limited to less than 1 MHz. The modulation bandwidth of the main coil is considerably less due to its much larger inductance needed to achieve its larger tuning range. As a consequence of requiring good loop stability in the PLL feedback control system, the loop bandwidth of the PLL must be less than the modulation bandwidth of the fine tune coil—usually limited to several hundred kHz.
Within the loop bandwidth the PLL can suppress the YIG oscillator's phase noise, but outside the loop bandwidth the phase noise levels are predominantly determined by the performance of the YIG oscillator. The limited modulation bandwidth of the fine tune coil, and resultant inability of the PLL to suppress the YIG oscillator's phase noise beyond approximately several hundred kHz from an RF carrier, is a limitation of the present technology. In applications where extremely low phase noise is required at offsets up to and beyond several MHz from the carrier, the YIG oscillator is extremely difficult and expensive, or even impossible, to manufacture. Such a problem occurs when measuring the Adjacent Channel Leakage Ratio (ACLR) of modern communications systems. Test equipment capable of measuring ACLR to better than −75 dB require internal oscillators with phase noise levels of −165 dBc/Hz at offset frequencies of 5 MHz and greater from the carrier. This is beyond the performance level presently achievable with conventional YIG oscillators and PLL techniques.
What is desired is a low noise YIG oscillator based PLL that provides the requisite low phase noise levels required for measurements in modern communications systems.